Reasons:
1. We know, Electrons has mobility 2.7 times higher the holes.
2. Since hole mobility is lesser than electron mobility, PMOS width must be greater to compensate
and make the pull-up network stronger.
3.If W to L of PMOS is same as the corresponding NMOS, the charging time of the output node
would be higher than that of the discharging time (related to NMOS)
W/L to PMOS is 2 or 3 times the W to L of NMOS.
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